Publication / 業績一覧

If you are interested in all the published articles, please visit https://trios.tsukuba.ac.jp/en/researcher/0000000912

Peer-reviewed Journal Articles

Peer-reviewed Conference Papers

  • Kazuki Furukawa, Tomoya Yokono, Yoshiki Yamaguchi, Kohji Yoshikawa, Norihisa Fujita, Ryohei Kobayashi, Taisuke Boku, and Masayuki Umemura, ``An Efficient RTL Buffering Scheme for an FPGA-Accelerated Simulation of Diffuse Radiative Transfer'', 2021 International Conference on Field-Programmable Technology, pp. 1-9, 2021, doi: 10.1109/ICFPT52863.2021.9609944.

  • Iman Firmansyah and Yoshiki Yamaguchi, ``FPGA-based Implementation of the Stereo Matching Algorithm using High-Level Synthesis", 2021 IEEE 14th International Symposium on Embedded Multicore/Many-core Systems-on-Chip, pp. 1-7, 2021, doi: 10.1109/MCSoC51149.2021.00009.

  • Ryo Nakagawa and Yoshiki Yamaguchi, ``Enhanced transplantability for smart agriculture drone by an FPGA with SD standards", Asia Pacific Conference on Robot IoT System Development and Platform, pp.50-54, 2021.

  • Yutaka Shinkai and Yoshiki Yamaguchi, ``A Study of Highly Accurate Calibration based on Multiple 6-axis IMUs", Asia Pacific Conference on Robot IoT System Development and Platform, pp.75-81, 2021.

  • Naoya Umezu, Yoshiki Yamaguchi, and Taisuke Boku, ``An FPGA-based storage control with load balancing", 2021 IEEE International Conference on Cluster Computing, pp. 791-794, 2021, doi: 10.1109/Cluster48925.2021.00118.

  • Norihisa Fujita, Ryohei Kobayashi, Yoshiki Yamaguchi, Taisuke Boku, Kohji Yoshikawa, Makito Abe, and Masayuki Umemura, ``OpenCL-enabled Parallel Raytracing for Astrophysical Application on Multiple FPGAs with Optical Links'', 2020 IEEE/ACM International Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC), pp.48-55, doi: 10.1109/H2RC51942.2020.00011, November 2020.

  • Ruochong FAN and Yoshiki YAMAGUCHI,``A study of FPGA-based cluster computing by high-speed serial-link communication'', 2020 Eighth International Symposium on Computing and Networking Workshops, pp.401-405, doi: 10.1109/CANDARW51189.2020.00082, November 2020.

  • Norihisa Fujita, Ryohei Kobayashi, Yoshiki Yamaguchi, Kohji Yoshikawa, Makito Abe, and Masayuki Umemura, ``Toward OpenACC-enabled GPU-FPGA Accelerated Computing'', 2020 IEEE International Conference on Cluster Computing, pp.422-423, doi: 10.1109/CLUSTER49012.2020.00060, September 2020.

  • Ryohei Kobayashi, Norihisa Fujita, Yoshiki Yamaguchi, Taisuke Boku, Kohji Yoshikawa, Makito Abe, and Masayuki Umemura, ``Accelerating Radiative Transfer Simulation with GPU-FPGA Cooperative Computation'', 2020 IEEE 31st International Conference on Application-specific Systems, Architectures and Processors, pp.9-16, doi: 10.1109/ASAP49362.2020.00011, July 2020.

  • Riadh Ben Abdelhamid, Yoshiki Yamaguchi, and Taisuke Boku, ``Condensing an overload of parallel computing ingredients into a single architecture recipe'', 2020 IEEE 31st International Conference on Application-specific Systems, Architectures and Processors, pp. 25-28, doi: 10.1109/ASAP49362.2020.00013, July 2020.

  • Norihisa Fujita, Ryohei Kobayashi, Yoshiki Yamaguchi, Tomohiro Ueno, Kentaro Sano, and Taisuke Boku, ``Performance Evaluation of Pipelined Communication Combined with Computation in OpenCL Programming on FPGA'', 2020 IEEE International Parallel and Distributed Processing Symposium Workshops, pp.450-459, doi: 10.1109/IPDPSW50202.2020.00083., May 2020.

  • Changdao Du, Iman Firmansyah, and Yoshiki Yamaguchi, ``High-Performance Computation of LGCA Fluid Dynamics on an FPGA-based Platform'', The 5th International Conference on Computer and Communication Systems, pp.520-525, doi: 10.1109/ICCCS49078.2020.9118557, May 2020.

  • Riadh Ben Abdelhamid and Yoshiki Yamaguchi, ``A block-based systolic array on an HBM FPGA for DNA sequence alignment'', The 16th International Symposium on Applied Reconfigurable Computing, doi: 10.1007/978-3-030-44534-8_23, pp.298-313, March 2020.

  • Changdao Du, Iman Firmansyah and Yoshiki Yamaguchi, ``FPGA-Based Computational Fluid Dynamics Simulation Architecture via High-Level Synthesis Design Method'', The 16th International Symposium on Applied Reconfigurable Computing, pp.232-246, doi: 10.1007/978-3-030-44534-8_18, March 2020.

  • Ryohei Kobayashi, Norihisa Fujita, Yoshiki Yamaguchi, Ayumi Nakamichi, and Taisuke Boku, ``OpenCL-enabled GPU-FPGA Accelerated Computing with Inter-FPGA Communication'', The International Conference on High Performance Computing in Asia-Pacific Region Workshops,pp.17-20, January 2020.

  • Mirai Niki, Yoshiki Yamaguchi, and Toshiyuki Amagasa, ``FPGA-based SPARQL query acceleration'', Asia Pacific Conference on Robot IoT System Development and Platform, Extended Abstract of ESS,(23) 1-2, November 2019.

  • Yuji Nagaoka and Yoshiki Yamaguchi, ``FPGA-based low latency framework for Vehicle-to-Vehicle wireless communication'', Asia Pacific Conference on Robot IoT System Development and Platform, Extended Abstract of ESS,(22) 1-2, November 2019.

  • Riadh Ben Abdelhamid, Yoshiki Yamaguchi, and Taisuke Boku, ``MITRACA, a next-gen heterogeneous architecture for scientific computing'', IEEE 13th International Symposium on Embedded Multicore/Many-core Systems-on-Chip,pp.304-311, October 2019.

  • Norihisa Fujita, Ryohei Kobayashi, Yoshiki Yamaguchi, and Taisuke Boku, ``Parallel Processing on FPGA Combining Computation and Communication in OpenCL Programming'', The Ninth International Workshop on Accelerators and Hybrid Exascale Systems,pp.479-488, July 2019.

  • Ryohei Kobayashi, Norihisa Fujita, Yoshiki Yamaguchi, Ayumi Nakamichi, and Taisuke Boku, ``GPU-FPGA Heterogeneous Computing with OpenCL-Enabled Direct Memory Access'', The Ninth International Workshop on Accelerators and Hybrid Exascale Systems,pp.489-498, July 2019.

  • Riadh Ben Abdelhamid, Yoshiki Yamaguchi, and Taisuke Boku, ``MITRACA: Manycore Interlinked Torus Reconfigurable Accelerator Architecture'',2019 IEEE 30th International Conference on Application-specific Systems, Architectures and Processors,pp.38, July 2019.

  • Changdao Du and Yoshiki Yamaguchi, ``A High-Level Synthesis Design for a Scalable Hydrodynamic Simulation on OpenCL FPGA Platform,' 'The 10th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies,(19) 1-4, June 2019.

  • Iman Firmansyah, Du Changdao, Norihisa Fujita, Yoshiki Yamaguchi, and Taisuke Boku, ``FPGA-based Implementation of Memory-Intensive Application using OpenCL'', The 10th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies,(16) 1-4, June 2019.

  • Ryohei Kobayashi, Norihisa Fujita, Yoshiki Yamaguchi, and Taisuke Boku, ``Parallel Processing on FPGA Combining Computation and Communication in OpenCL Programming'',2019 IEEE International Parallel and Distributed Processing Symposium Workshops,pp.479-488, doi: 10.1109/IPDPSW.2019.00089, May 2019.

  • Norihisa Fujita, Ryohei Kobayashi, Yoshiki Yamaguchi, Yuma Oobata, Taisuke Boku, Makito Abe, Kohji Yoshikawa, and Masayuki Umemura, ``Accelerating Space Radiate Transfer on FPGA using OpenCL'', International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies,pp.1-7, doi:10.1145/3241793.3241799, June 2018.

  • Ryohei Kobayashi, Yuma Oobata, Norihisa Fujita, Yoshiki Yamaguchi, and Taisuke Boku, ``OpenCL-ready High Speed FPGA Network for Reconfigurable High Performance Computing'', HPC Asia 2018, pp.192-201, January 2018.

  • Iman Firmansyah, Yusuf Nur Wijayanto, and Yoshiki Yamaguchi,``2D Stencil Computation on Cyclone V SoC FPGA using OpenCL'',2018 International Conference on Radar, Antenna, Microwave, Electronics, and Telecommunications,pp.121-124, November, 2018.

  • Hiroki Nakamura, Hirotaka Takayama, Yoshiki Yamaguchi, and Taisuke Boku, ``Thorough analysis of PCIe Gen3 Communication'', International Conference on Reconfigurable Computing and FPGAs,pp.1-6., December, 2017.

  • Nakano Masataka and Yamaguchi Yoshiki, ``A Study of TRAX Player by Template Matching'', International Workshop on Advances in Networking and Computing,pp.570-574, November 2017.

  • Chengzhe Li, Hiroshi Maruyama, Lai Yoong Yee, and Yoshiki Yamaguchi, ``FPGA-based Volleyball Player Tracker'', ACM SIGARCH Computer Architecture News, Vol.44, Issue 4, pp.80-85, December, 2016.

  • M. Nakano and Y. Yamaguchi, ``A Study of TRAX Player by Template Matching'', International Workshop on Advances in Networking and Computing,pp.570-574, November, 2017.

  • Iman Firmansyah, Yoshiki Yamaguchi, and Taisuke Boku, ``Performance evaluation of Stratix V DE5-Net FPGA board for high performance computing'', The 2016 International Conference on Computer, Control, Informatics and its Applications,pp.23-27, October, 2016.

  • Iman Firmansyah, Yoshiki Yamaguchi, and Taisuke Boku, ``Capability assessment of a multiple-FPGA system for high-performance computing'', ISC 2016 HPC in ASIA Posters, June, 2016.

  • H. Jin, Y. Yamaguchi and Y. Kodama, ``Efficient shared cache system for ARM-based multi-core processors'', The 5th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART2014),pp.99-102, June, 2014.

  • S. Ochiai, Y. Yamaguchi and Y. Kodama, ``The Flexible Sound Synthesizer on an FPGA'', International Symposium on Computing and Networking --Across Practical Development and Theoretical Research-- (CANDAR2013),pp.104-111, Dec. 2013.

  • K. Kinoshita, T. Okamura, D. Takano, T. Yao and Y. Yamaguchi, ``Spatiotemporal modular arrangement for energy efficient reconfigurable SoCs'', the IEEE 7th International Symposium on Embedded Multicore System on Chips (MCSoC2013),pp.97-100, Sept. 2013.

  • K. Fujinami, Y. Yamaguchi, A. Sugiura and Y. Kodama, ``A Study of a Three-Dimensional Multiphase-Flow Simulator'', The 23rd international conference on field programmable logic and applications (FPL2013),pp.1-4, Sept. 2013.

  • T. Yabuki, Y. Yamaguchi, and Y. Kodama, ``Real-time Video Stabilization on an FPGA,'' The IEEE 2013 International Conference on Smart Structures and Systems (ISSS2013),pp.114-1196, Mar. 2013.

  • K. Kinoshita, D. Takano, T. Okamura, T. Yao and Y. Yamaguchi, ``An augmented reality system with a coarse-grained reconfigurable device'', ACM SIGARCH CAN, Vol.40, Issue 5, pp.16-21, 2012.

  • T. Yabuki, S. Ochiai, Y. Yamaguchi and Y. Kodama,``Connect6 Game-tree Reduction based on Image Processing and Its Positional Symmetric Property, ''International Workshop on Highly-Efficient Accelerators and Reconfigurable Technologies (HEART2012),pp.159-162, May 2012.

  • S. Tanabe, T. Nagashima, and Y. Yamaguchi, ``An Augmented Reality System with Coarse-Grained Device'', ACM SIGARCH CAN Vol.39 Issue 4, pp.86-89, 2011.

  • Yoshiki Yamaguchi, Kuen-Hung Tsoi, and Wayne Luk, ``FPGA-based Smith-Waterman Algorithm: Analysis and Novel Design'', Int'l Conf. on Applied Reconfigurable Computing (ARC2011),pp.181-192, Mar. 2011.

  • Yoshiki Yamaguchi, Kuen-Hung Tsoi, and Wayne Luk, ``A comparison of FPGAs, GPUs and CPUs for Smith-Waterman algorithm'', Int'l Symp. on Field-Programmable Gate Arrays (FPGA2011), pp.281, Feb. 2011.

  • Shuhei Yoshida and Yoshiki Yamaguchi, ``A Study of an FPGA Synthesizer'', Int'l Conf. on Audio, Language and Image Processing (ICALIP2010),pp.1205-1210, Nov. 2010.

  • Yusuke Arai, Yoshiki Yamaguchi, Moritoshi Yasunaga, ``FCHC Lattice Gas Model on Playstation3'',Int'l Workshop on Highly-Efficient Accelerators and Reconfigurable Technologies (HEART2010),pp.131-136, Jun. 2010.

  • S. Hiinaga, Y. Yamaguchi, T. Yao, and T. Kawabe, ``Dynamic Reconfiguration System for Real-Time Video Processing'', Int'l Conf. on Field Programmable Logic and Applications (FPL2010),pp.691-694, Aug. 2009.

  • S. Asano, T. Maruyama and Y. Yamaguchi, ``Performance Comparison of FPGA, GPU and CPU in Image Processing'', Int'l Conf. on Field Programmable Logic and Applications (FPL2009),pp.126-131, Aug. 2009.

  • A. Kanamaru, H. Kawai, Y. Yamaguchi, M. Yasunaga, ``Tile-Based Fault-Tolerant Approach using Partial Reconfiguration'', Int'l WS on Applied Reconfigurable Computing (ARC2009),pp.293-299, Mar. 2009.

  • Y. Arai, Y. Yamaguchi, T. Maruyama, and M. Yasunaga, ``Experience of Lattice Gas Automata Simulator -- toward large-scale PlayStation 3 cluster --'',Parallel and Distributed Computing and Networks 2009 (PDCN2009),pp.181-188, Feb. 2009.

  • H. Kawai, Y. Yamaguchi, M. Yasunaga, K. Glette and J. Torresen, ``A Self-Adaptive Pattern Recognition Hardware with On-chip Partial Reconfiguration'', Int'l Conf. on Field-Programmable Technology 2008 (ICFPT'08),pp.169-176, Dec. 2008.

  • T. Saegusa, T. Maruyama, and Y. Yamaguchi, ``How fast is an FPGA in image processing?'',18th Int'l Conf. on Field-Programmable Logic and Applications (FPL2008),pp.77-82, Sep. 2008.

  • Y. Yamaguchi, N. Aibe, M. Yasunaga, Y. Yamamoto, T. Awano, and Ikuo Yoshihara, ``Bio-Inspired Functional Asymmetry Camera System'', Int'l Conf. on Neural Information Processing (ICONIP2007),pp.637-646, Nov. 2007.

  • Y. Arai, R. Sawai, Y. Yamaguchi, T. Maruyama, and M. Yasunaga, ``A Lattice Gas Cellular Automata Simulator with Cell Broadband Engine'', Parallel Computing 2007 (ParCo2007),pp.459-466, Sep. 2007.

  • Y. Yamaguchi, T. Maruyama, F. Konoshi, and A. Konagaya, ``High speed tabulation system using an FPGA designed for distribution tables of frequent DNA subsequences'',17th Int'l Conf. on Field-Programmable Logic and Applications (FPL2007),pp.145-150, Aug. 2007.

  • S. Masuno, T. Maruyama, Y. Yamaguchi, and A. Konagaya, ``An FPGA Implementation of Multiple Sequence Alignment Based on Carrillo-Lipman Method'',17th Int'l Conf. on Field-Programmable Logic and Applications (FPL2007),pp.489-492, Aug. 2007.

  • Y. Yamaguchi, K. Kanazawa, Y. Ohke and T. Maruyama, ``An acceleration method for evolutionary systems based on iterated prisoner's dilemma'', International Workshop on Applied Reconfigurable Computing (ARC2007), pp.358-364, Mar. 2007.

  • H. Kawai, Y. Yamaguchi, and M. Yasunaga, ``Realization of the sound space environment for the radiation-tolerant space craft'', the 3rd International Conference on ReConFigurable Computing and FPGAs (ReConFig2006), pp.198-205, Sep. 2006.

  • S. Masuno, T. Maruyama, Y. Yamaguchi, A. Konagaya, ``Multidimensional Dynamic Programming for Homology Search on Distributed Systems'', European Conference on Parallel Computing (Euro-Par2006), pp.1127-1137, Sep. 2006.

  • H. Kawai, Y. Yamaguchi, and M. Yasunaga, ``Improvement of module redundancy using FPGA'', 6th European Workshop on Microelectronics Education (EWME2006), pp.67-70, Jun. 2006.

  • K. Glette, J. Torresen, Y. Yamaguchi, and M. Yasunaga, ``On-Chip Evolution Using a Soft Processor Core Applied to Image Recognition'', First NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2006), pp.373-380, Jun. 2006.

  • Y. Yamaguchi, T. Maruyama, R. Azuma. and A. Konagaya, ``Spatiotemporal Simulation of a Single Living Cell'', IEEE 2005 Conference on Field-Programmable Technology (ICFPT'05),pp.267-274, Dec. 2005.

  • S. Masuno, T. Maruyama, Y. Yamaguchi, and A. Konagaya, ``Multidimensional Dynamic Programming for Homology Search'',15th International Conference on Field Programmable Logic and Applications (FPL2005),pp.173-178, Aug. 2005.

  • R. Azuma, Y. Yamaguchi, T. Kitagawa, T. Yamamoto, and A. Konagaya, ``Mesoscopic simulation method for spatio-temporal dynamics under molecular interactions'', HUGO's 10th Human Genome Meeting (HGM2005),WOS5-036/WPS5-070, Apr. 2005.

  • Y. Yamaguchi, T. Maruyama, and A. Konagaya, ``Three-dimensional dynamic programming for homology search,''14th International Conference on Field Programmable Logic and Applications (FPL2004),pp.505-515, Aug. 2004.

  • Y. Yamaguchi, R. Azuma, and A. Konagaya, ``An approach for high speed Monte Carlo simulation with FPGA --toward a whole cell simulation--'',46th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS2003),No.386B(1-4), Dec. 2003.

  • Y. Yamaguchi, Y. Miyajima, T. Maruyama, A. Konagaya, ``High Speed Homology Search with Run-time Reconfiguration,''12th International Conference on Field-Programmable Logic and Applications (FPL2002),pp.281-291. Sep. 2002.

  • Y. Yamaguchi, T. Maruyama, and A. Konagaya, ``High Speed Homology Search with FPGAs, ''Pacific Symposium on Biocomputing 2002 (PSB2002), pp.271-282, Jan. 2002. Y. Yamaguchi, T. Maruyama, and A. Konagaya, ``An Approach for High Speed Homology Search with FPGAs,`` 5th International Conference on Knowledge-Based Intelligent Information Engineering Systems & Allied Technologies (KES'2001),pp.783-787, Se. 2001.

  • T. Maruyama, Y. Yamaguchi, and A. Kawase, ``An Approach to Real-Time Visualization of PIV Method with FPGA,''11th International Conference on Field-Programmable Logic and Applications (FPL2001),pp.601-606, Aug. 2001.

  • Y. Yamaguchi, A. Miyashita, T. Maruyama, and T. Hoshino, ``A Co-processor System with a Virtex FPGA for Evolutionary Computation,''10th International Conference on Field-Programmable Logic and Applications (FPL2000),pp.240-249, Aug. 2000.

  • Y. Yamaguchi, T. Maruyama, and T. Hoshino, ``A Co-evolution Model of Scores and Strategies in IPD games --toward the understanding of the emergence of the social morals--,''7th International Conference on Artificial Life (ALIFE VII),pp.362-366, August 2000.

  • Y. Yamaguchi, T. Maruyama, and T. Hoshino, ``High Speed Hardware Computation of Co-evolution Models,''5th European Conference on Artificial Life (ECAL'99),pp.566-574, Sep. 1999.